Java in Simulation Time - Revision history

Kurth at 14:35, 2 March 2006

2006-03-02T14:35:03Z

← Older revision		Revision as of 14:35, 2 March 2006
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	* [http://www.cs.technion.ac.il/~gabik/Javis4Swans.html Javis]		* [http://www.cs.technion.ac.il/~gabik/Javis4Swans.html Javis]

			== McExOR in JiST ==

			* [[McExOR in JiST]]

	== Further Information ==		== Further Information ==

Kurth: /* Pitfalls */

2006-02-23T12:45:17Z

Pitfalls

← Older revision		Revision as of 12:45, 23 February 2006
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	* Superclasses must be final. Otherwise the Rewriter generates invalid code (A java.verifier exception will occur). So a best practise is to mark all concrete classes as final to prevent this error.		* Superclasses must be final. Otherwise the Rewriter generates invalid code (A java.verifier exception will occur). So a best practise is to mark all concrete classes as final to prevent this error.
	* Since it is a discrete simulator, it is possible to schedule more than one event at exactly one point in time. In this particular case, the execution order is not predefined.		* Since it is a discrete simulator, it is possible to schedule more than one event at exactly one point in time. In this particular case, the execution order is not predefined.
	* Jist does not (fully) support polymorphism for implementation classes (entities), only for interfaces.		* Jist does not (fully) support polymorphism for implementation classes (entities), only for interfaces.
			** Workaround 1: Do not use implementation inheritance.
			** Workaround 2: Use implementation inheritance, but do not use overriding of methods.
			** Workaround 3: Use method overriding, but make sure all methods (the overridden and the overriding) are both rewritten in the same way, i.e. they are both continuable or both not.

	=== Interesting Things ===		=== Interesting Things ===

Kurth: /* Pitfalls */

2006-02-20T19:17:49Z

Pitfalls

← Older revision		Revision as of 19:17, 20 February 2006
Line 9:		Line 9:
	* Superclasses must be final. Otherwise the Rewriter generates invalid code (A java.verifier exception will occur). So a best practise is to mark all concrete classes as final to prevent this error.		* Superclasses must be final. Otherwise the Rewriter generates invalid code (A java.verifier exception will occur). So a best practise is to mark all concrete classes as final to prevent this error.
	* Since it is a discrete simulator, it is possible to schedule more than one event at exactly one point in time. In this particular case, the execution order is not predefined.		* Since it is a discrete simulator, it is possible to schedule more than one event at exactly one point in time. In this particular case, the execution order is not predefined.
			* Jist does not (fully) support polymorphism for implementation classes (entities), only for interfaces.

	=== Interesting Things ===		=== Interesting Things ===

Kurth: /* Further Information */

2006-02-07T10:28:02Z

Further Information

← Older revision		Revision as of 10:28, 7 February 2006
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	* [http://www.cs.technion.ac.il/~gabik/Javis4Swans.html Javis]		* [http://www.cs.technion.ac.il/~gabik/Javis4Swans.html Javis]


	== Further Information ==		== Further Information ==

Kurth: /* Extensions */

2006-02-07T10:25:27Z

Extensions

← Older revision		Revision as of 10:25, 7 February 2006
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	== Extensions ==		== Extensions ==

			* [http://www.cs.technion.ac.il/~gabik/Javis4Swans.html Javis]
	* Javis


	== Further Information ==		== Further Information ==

Kurth at 10:24, 7 February 2006

2006-02-07T10:24:26Z

← Older revision		Revision as of 10:24, 7 February 2006
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	}		}
	break;		break;


	== Multi-Channel Support for JiST ==		== Multi-Channel Support for JiST ==
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	** Delayed channel switching (only possible, when not transmitting)		** Delayed channel switching (only possible, when not transmitting)
	** TODO Cross-channel interference		** TODO Cross-channel interference


	== ExOR Implementation in JiST ==		== ExOR Implementation in JiST ==
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	* [http://pdos.csail.mit.edu/papers/roofnet:exor-hotnets03/roofnet_exor-hotnets03.pdf Opportunistic Routing in MultiHop Wireless Networks]		* [http://pdos.csail.mit.edu/papers/roofnet:exor-hotnets03/roofnet_exor-hotnets03.pdf Opportunistic Routing in MultiHop Wireless Networks]


			== Extensions ==

			* Javis


	== Further Information ==		== Further Information ==

Kurth: /* ExOR Implementation in JiST */

2006-02-07T09:46:33Z

ExOR Implementation in JiST

← Older revision		Revision as of 09:46, 7 February 2006
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	=== References ===		=== References ===

	* [http://pdos.csail.mit.edu/papers/ Opportunistic Routing in MultiHop		* [http://pdos.csail.mit.edu/papers/roofnet:exor-hotnets03/roofnet_exor-hotnets03.pdf Opportunistic Routing in MultiHop Wireless Networks]
	Wireless Networks]

	== Further Information ==		== Further Information ==

Kurth: /* ExOR Implementation in JiST */

2006-02-07T09:46:19Z

ExOR Implementation in JiST

← Older revision		Revision as of 09:46, 7 February 2006
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	Bytes \| 2 \| 6 \| 6 \| 1 \| 4 \|		Bytes \| 2 \| 6 \| 6 \| 1 \| 4 \|
	\|----------------------------------------------------\|		\|----------------------------------------------------\|

			=== References ===

			* [http://pdos.csail.mit.edu/papers/ Opportunistic Routing in MultiHop
			Wireless Networks]

	== Further Information ==		== Further Information ==

Kurth: /* Misc */

2006-02-07T09:32:51Z

Misc

← Older revision		Revision as of 09:32, 7 February 2006
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	* JiST does not support JUnit.Workaround: Write test code without JUnit support.		* JiST does not support JUnit.Workaround: Write test code without JUnit support.
	* Superclasses must be final. Otherwise the Rewriter generates invalid code (A java.verifier exception will occur). So a best practise is to mark all concrete classes as final to prevent this error.		* Superclasses must be final. Otherwise the Rewriter generates invalid code (A java.verifier exception will occur). So a best practise is to mark all concrete classes as final to prevent this error.
			* Since it is a discrete simulator, it is possible to schedule more than one event at exactly one point in time. In this particular case, the execution order is not predefined.

	=== Interesting Things ===		=== Interesting Things ===

Kurth: /* Frame Format */

2006-02-05T19:15:34Z

Frame Format

← Older revision		Revision as of 19:15, 5 February 2006
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	\|------------------------\|----------------------------------------------------\|-----\|		\|------------------------\|----------------------------------------------------\|-----\|
	\| \| Mac Frame \| \|		\| \| Mac Frame \| \|
	\|----------\|-------------\|---------------\|-------------------\|----------\|-----\|-----\|		\|----------\|-------------\|---------------\|---------\|---------\|----------\|-----\|-----\|
	\| Preamble \| PLCP Header \| Frame Control \| DstAddr \| SrcAddr \| Cand. ID \| FCS \| Pad \|		\| Preamble \| PLCP Header \| Frame Control \| DstAddr \| SrcAddr \| Cand. ID \| FCS \| Pad \|
	\|----------\|-------------\|---------------\|-------------------\|----------\|-----\|-----\|		\|----------\|-------------\|---------------\|---------\|---------\|----------\|-----\|-----\|
	Bytes \| 2 \| 6 \| 6 \| 1 \| 4 \|		Bytes \| 2 \| 6 \| 6 \| 1 \| 4 \|
	\|----------------------------------------------------\|		\|----------------------------------------------------\|

← Older revision		Revision as of 19:15, 5 February 2006
Line 80:		Line 80:
	\|------------------------\|----------------------------------------------------\|-----\|		\|------------------------\|----------------------------------------------------\|-----\|
	\| \| Mac Frame \| \|		\| \| Mac Frame \| \|
	\|----------\|-------------\|---------------\|-------------------\|----------\|-----\|-----\|		\|----------\|-------------\|---------------\|---------\|---------\|----------\|-----\|-----\|
	\| Preamble \| PLCP Header \| Frame Control \| DstAddr \| SrcAddr \| Cand. ID \| FCS \| Pad \|		\| Preamble \| PLCP Header \| Frame Control \| DstAddr \| SrcAddr \| Cand. ID \| FCS \| Pad \|
	\|----------\|-------------\|---------------\|-------------------\|----------\|-----\|-----\|		\|----------\|-------------\|---------------\|---------\|---------\|----------\|-----\|-----\|
	Bytes \| 2 \| 6 \| 6 \| 1 \| 4 \|		Bytes \| 2 \| 6 \| 6 \| 1 \| 4 \|
	\|----------------------------------------------------\|		\|----------------------------------------------------\|